vlsibank

Log in or Sign up.
Main EDA Embedded Systems ASIC FPGA VHDL Verilog CMOS Semiconductors DSP Mixed Signal Architecture Miscellaneous

<-- Previous Next -- > TOPIC: code for floating point multiplier in vhdl
Posted by: Rupsvhdl     1/21/2009 12:47:08 AM     Category: VHDL
Questions posted: 2         Comments Posted: 1
can I get code for floating point multiplier in vhdl? help me plz.

Posted by: jishathomas     6/26/2013 9:33:49 PM
Comments Posted:3       

hi sir, i need contents to make report on floating point multiplier


Posted by: jishathomas     6/26/2013 9:33:49 PM
Comments Posted:3       

hi sir, i need contents to make report on floating point multiplier


Posted by: vasuabhilash     2/12/2009 8:12:44 AM
Comments Posted:9       Questions Posted:5

u just mail to vasuabhilash@gmail.com so i can clear ur doubts. i ve all the documents of floating point


Posted by: Rupsvhdl     2/10/2009 8:50:28 AM
Comments Posted:1       Questions Posted:2

thanks for your quick replay. But this code is about multiplication of single precision no
and i need  floating point  converter pr


Posted by: vasuabhilash     1/30/2009 7:57:59 AM
Comments Posted:9       Questions Posted:5

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;


entity fnc_fp_mul is
   Port ( x,y : in std_logic_vector(31 downto 0);
          z : out std_logic_vector(31 downto 0));
end fnc_fp_mul;

architecture Behavioral of fnc_fp_mul is

function fp_m(a,b:in std_logic_vector(31 downto 0)) return std_logic_vector;
function fp_m(a,b:in std_logic_vector(31 downto 0)) return std_logic_vector is


variable c11 : std_logic_vector(31 downto 0);
variable p1:std_logic_vector(47 downto 0);
variable p2,p3,z11,z1:std_logic_vector(7 downto 0);
variable count:std_logic_vector(7 downto 0):="00000000";
variable p11:std_logic_vector(0 to 47);
variable a2:std_logic_vector(7 downto 0):="01111111";
variable a3:std_logic_vector(7 downto 0):="00000001";
variable a4:std_logic_vector(7 downto 0):="00000011";
variable c1,c2:std_logic_vector(23 downto 0);
variable count1:integer;
variable p4:std_logic_vector(7 downto 0);



begin


c11(31):=a(31) xor b(31);
p2:=a(30 downto 23) + b(30 downto 23);
c1:='1' & a(22 downto 0);
c2:='1' & b( 22 downto 0);
p1:=  c1(23 downto 0) *  c2( 23 downto 0);
p3(7 downto 0):=p2(7 downto 0)- a2(7 downto 0 );
z11:=p3;
for i in 0 to 47 loop
p11(i):=p1(47-i);
end loop;

if p1(47 downto 46)="00" then
for i in 0 to 22  loop
count:=count+"00000001";
if p11(i)='1' then
exit;
end if;
end loop;
count1:=conv_integer(count);
z1(7 downto 0):= z11(7 downto 0) + count;
c11(22 downto 0):=p1(46-count1 downto 23+count1 );
p4(7 downto 0):=z1;


elsif p1(47 downto 46)="01" then
p4(7 downto 0):=z11(7 downto 0);
c11(22 downto 0):=p1(45 downto 23);
 

elsif p1(47 downto 46)="10" then
  p4(7 downto 0):=z11(7 downto 0)+a3(7 downto 0);
  c11(22 downto 0):=p1(46 downto 24);

  elsif p1(47 downto 46)="11" then
p4(7 downto 0):=z11(7 downto 0)+a4(7 downto 0);
   c11(22 downto 0):=p1(47 downto 25);
  end if;

c11(30 downto 23):=p4(7 downto 0);  
return c11;

end function;

begin
z<=fp_m(x,y);
end Behavioral;




You have to be logged in to be able to post a comment. To login click here. First time? Sign up. It just takes a few minutes to sign up.

Login to access the site

  Username:
  Password:
   Signup Forgot Password?    

Users with most replies

   User
 No. of Replies
264
104
86
76
75
70
63
61
57